/* Generated automatically by the program `gencodes'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CODES_H
#define GCC_INSN_CODES_H

enum insn_code {
  CODE_FOR_nothing = 0,
  CODE_FOR_set_hi_si = 6,
  CODE_FOR_lo_sum_si = 7,
  CODE_FOR_zero_extendqihi2 = 11,
  CODE_FOR_zero_extendqisi2 = 12,
  CODE_FOR_zero_extendhisi2 = 13,
  CODE_FOR_extendqihi2 = 14,
  CODE_FOR_extendqisi2 = 15,
  CODE_FOR_extendhisi2 = 16,
  CODE_FOR_addsi3 = 17,
  CODE_FOR_adddi3 = 18,
  CODE_FOR_subsi3 = 21,
  CODE_FOR_subdi3 = 22,
  CODE_FOR_mulhisi3 = 24,
  CODE_FOR_mulsi3 = 25,
  CODE_FOR_divsi3 = 26,
  CODE_FOR_udivsi3 = 27,
  CODE_FOR_modsi3 = 28,
  CODE_FOR_umodsi3 = 29,
  CODE_FOR_andsi3 = 30,
  CODE_FOR_iorsi3 = 31,
  CODE_FOR_xorsi3 = 32,
  CODE_FOR_negsi2 = 33,
  CODE_FOR_one_cmplsi2 = 34,
  CODE_FOR_ashlsi3 = 35,
  CODE_FOR_ashrsi3 = 36,
  CODE_FOR_lshrsi3 = 37,
  CODE_FOR_cmp_eqsi_zero_insn = 38,
  CODE_FOR_cmp_eqsi_insn = 39,
  CODE_FOR_cmp_ltsi_insn = 40,
  CODE_FOR_cmp_ltusi_insn = 41,
  CODE_FOR_seq_insn_m32rx = 48,
  CODE_FOR_seq_zero_insn = 49,
  CODE_FOR_seq_insn = 50,
  CODE_FOR_sne_zero_insn = 51,
  CODE_FOR_slt_insn = 52,
  CODE_FOR_sle_insn = 53,
  CODE_FOR_sge_insn = 54,
  CODE_FOR_sltu_insn = 55,
  CODE_FOR_sleu_insn = 56,
  CODE_FOR_sgeu_insn = 57,
  CODE_FOR_movcc_insn = 58,
  CODE_FOR_jump = 59,
  CODE_FOR_indirect_jump = 60,
  CODE_FOR_return_lr = 61,
  CODE_FOR_return_rte = 62,
  CODE_FOR_nop = 68,
  CODE_FOR_blockage = 69,
  CODE_FOR_flush_icache = 70,
  CODE_FOR_absdf2 = 71,
  CODE_FOR_abssf2 = 72,
  CODE_FOR_movmemsi_internal = 74,
  CODE_FOR_pic_load_addr = 75,
  CODE_FOR_gotoff_load_addr = 76,
  CODE_FOR_get_pc = 77,
  CODE_FOR_prologue = 78,
  CODE_FOR_epilogue = 79,
  CODE_FOR_movqi = 80,
  CODE_FOR_movhi = 81,
  CODE_FOR_movsi_push = 82,
  CODE_FOR_movsi_pop = 83,
  CODE_FOR_movsi = 84,
  CODE_FOR_movsi_sda = 85,
  CODE_FOR_movsi_addr32 = 86,
  CODE_FOR_movdi = 87,
  CODE_FOR_movsf = 88,
  CODE_FOR_movdf = 89,
  CODE_FOR_cbranchsi4 = 90,
  CODE_FOR_cstoresi4 = 91,
  CODE_FOR_return = 92,
  CODE_FOR_return_normal = 93,
  CODE_FOR_tablejump = 94,
  CODE_FOR_call = 95,
  CODE_FOR_call_value = 96,
  CODE_FOR_movsicc = 97,
  CODE_FOR_movmemsi = 98,
  CODE_FOR_builtin_setjmp_receiver = 99
};

const unsigned int NUM_INSN_CODES = 100;
#endif /* GCC_INSN_CODES_H */
