/* Generated automatically by the program `genattr-common'
   from the machine description file `md'.  */

#ifndef GCC_INSN_ATTR_COMMON_H
#define GCC_INSN_ATTR_COMMON_H

enum attr_nonce_enabled {NONCE_ENABLED_NO, NONCE_ENABLED_YES};
enum attr_ce_enabled {CE_ENABLED_NO, CE_ENABLED_YES};
enum attr_cpu {CPU_ITANIUM, CPU_ITANIUM2};
enum attr_itanium_class {ITANIUM_CLASS_UNKNOWN, ITANIUM_CLASS_IGNORE, ITANIUM_CLASS_STOP_BIT, ITANIUM_CLASS_BR, ITANIUM_CLASS_FCMP, ITANIUM_CLASS_FCVTFX, ITANIUM_CLASS_FLD, ITANIUM_CLASS_FLDP, ITANIUM_CLASS_FMAC, ITANIUM_CLASS_FMISC, ITANIUM_CLASS_FRAR_I, ITANIUM_CLASS_FRAR_M, ITANIUM_CLASS_FRBR, ITANIUM_CLASS_FRFR, ITANIUM_CLASS_FRPR, ITANIUM_CLASS_IALU, ITANIUM_CLASS_ICMP, ITANIUM_CLASS_ILOG, ITANIUM_CLASS_ISHF, ITANIUM_CLASS_LD, ITANIUM_CLASS_CHK_S_I, ITANIUM_CLASS_CHK_S_F, ITANIUM_CLASS_CHK_A, ITANIUM_CLASS_LONG_I, ITANIUM_CLASS_MMALUA, ITANIUM_CLASS_MMMUL, ITANIUM_CLASS_MMSHF, ITANIUM_CLASS_MMSHFI, ITANIUM_CLASS_RSE_M, ITANIUM_CLASS_SCALL, ITANIUM_CLASS_SEM, ITANIUM_CLASS_STF, ITANIUM_CLASS_ST, ITANIUM_CLASS_SYST_M0, ITANIUM_CLASS_SYST_M, ITANIUM_CLASS_TBIT, ITANIUM_CLASS_TOAR_I, ITANIUM_CLASS_TOAR_M, ITANIUM_CLASS_TOBR, ITANIUM_CLASS_TOFR, ITANIUM_CLASS_TOPR, ITANIUM_CLASS_XMPY, ITANIUM_CLASS_XTD, ITANIUM_CLASS_NOP, ITANIUM_CLASS_NOP_B, ITANIUM_CLASS_NOP_F, ITANIUM_CLASS_NOP_I, ITANIUM_CLASS_NOP_M, ITANIUM_CLASS_NOP_X, ITANIUM_CLASS_LFETCH, ITANIUM_CLASS_PRE_CYCLE};
enum attr_type {TYPE_UNKNOWN, TYPE_A, TYPE_I, TYPE_M, TYPE_F, TYPE_B, TYPE_L, TYPE_X, TYPE_S};
enum attr_itanium_requires_unit0 {ITANIUM_REQUIRES_UNIT0_NO, ITANIUM_REQUIRES_UNIT0_YES};
enum attr_predicable {PREDICABLE_NO, PREDICABLE_YES};
enum attr_empty {EMPTY_NO, EMPTY_YES};
enum attr_first_insn {FIRST_INSN_NO, FIRST_INSN_YES};
enum attr_data_speculative {DATA_SPECULATIVE_NO, DATA_SPECULATIVE_YES};
enum attr_control_speculative {CONTROL_SPECULATIVE_NO, CONTROL_SPECULATIVE_YES};
enum attr_check_load {CHECK_LOAD_NO, CHECK_LOAD_YES};
enum attr_speculable1 {SPECULABLE1_NO, SPECULABLE1_YES};
enum attr_speculable2 {SPECULABLE2_NO, SPECULABLE2_YES};
#define INSN_SCHEDULING
#define DELAY_SLOTS 0

#endif /* GCC_INSN_ATTR_COMMON_H */
